This invention relates generally to clock circuits as used in electronic integrated circuits, and more particularly, the invention relates to clock selection circuits which allow internal clock operation or external clock operation.
In many electronic circuits, digital clock signals are required to control functional operations of various subcircuit blocks. To ease user interface requirements, clock signals are often provided by internal clock generators. However, since the same circuit may require different types of clock signals is different applications, it is usually desirable to provide the circuit with an access input port so that the user can, when necessary, apply an external clock signal to satisfy the needs of a particular application. When an external clock signal is chosen rather than the internal clock, the internal clock generator is normally disabled to prevent it from interfering with circuit operation. Therefore, a circuit with an optional external clock access conventionally requires two input ports, namely one for applying the external clock signal and the other for clock selection input which is applied externally to disable the internal clock generator circuitry.
The use of two input ports for external clock operation has several drawbacks. First, many packages semiconductor integrated circuits are limited in the number of pins available. Secondly, an additional clock selection input is required to determine whether internal or external clock signal is selected. Further, if noise accidentally gets into the signal selection pin when the selection pin is left open, internal oscillator operation can be momentarily disabled thus interrupting the control clock.